Difference between revisions of "PCBs"
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====Using Image Processing to detect PCB Errors==== | ====Using Image Processing to detect PCB Errors==== | ||
[[Software#Ansys]] | [[Software#Ansys]] | ||
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[[Category:online notes]] | [[Category:online notes]] | ||
Revision as of 05:28, 16 November 2025
PCBs. esPCB, ésePCB
Tips/Techniques
List
- https://www.eevblog.com/forum/projects/ive-never-seen-a-circuit-board-made-like-this/ - a way of using solder on epoxy board for traces. Allows for iterative development but has an up front investment. Would be interesting to see this done without the cnc, but with just a hot solder pen for modifications. That might be the answer to avoiding breadboards, which I don't like, and protoboards are better but not perfect, I should try this. There was also a follow up video, named "Howie did it - 3D printing a printed circuit board".
- https://pcdandf.com/pcdesign/index.php/current-issue/293-board-talk/18918-minimum-finished-hole-size-and-how-it-impacts-manufacturability -
"Not long ago, a customer sent us an 8-layer rigid PCB design for quotation. On the surface, nothing unusual – until we noticed the minimum finished hole size (FHS) was 4 mils. That number might not sound alarming, but in PCB manufacturing, 4 mils is a red flag. Here’s why. The issue arises when fabricators drill a plated through-hole (PTH) and deposit copper during plating. The remaining diameter after this process becomes the finished hole size. A 4-mil FHS with a tolerance of ±4 mils technically ranges from 0 to 8 mils. That kind of spread becomes nearly impossible to maintain in volume production. To make a PTH, fabricators start with a larger drill size and plate copper along the walls. The smaller the drill, the shorter its flute length – and the fewer panels manufacturers can drill in a stack. Large-scale factories typically drill 10–20 panels at a time for efficiency, but a tiny drill bit can’t survive that workload, which drives up cost and limits throughput. In practice, the smallest common drill diameters used in offshore volume production sit around 8 mils (0.2 mm). After plating (about 1 mil per side for IPC Class 3), that leaves a finished hole closer to 6 mils. Designing for 4 mils simply doesn’t align with what’s achievable at scale. Could we force it? Yes, by over-plating, doubling the copper thickness and dramatically slowing the line. But that’s a recipe for higher costs, longer lead times and questionable yield. Bottom line: A 4-mil finished hole is feasible only in small prototype runs, not in cost-sensitive, high-volume production. When considering 4-mil finished holes in a PCB design, pause. Building prototypes in a specialized facility is possible, but impractical for volume production. Instead, explore HDI strategies with laser-drilled microvias to achieve density without sacrificing manufacturability or cost."
Rivets
- http://fab.cba.mit.edu/classes/863.16/doc/tutorials/PCB_Rivets/ - Guide on PCB rivets, 2 size recommendations, and how to flatten one side with a punch and hammer after installing. There are many rivet guns for sale, but it's good to see that the fundamental idea of rivets needs only a hammer and a punch.
- https://www.eevblog.com/forum/repair/rivetseyelets-for-pcb-repair/ - Places to source rivets/eyelets
Thermal Design
- https://www.ti.com/lit/an/snva419c/snva419c.pdf - Copper thickness and power dissipation.
- https://www.eevblog.com/forum/manufacture/need-help-desciphering-layout-specs/ - reference for TI data sheet.
See also Software#Simulations