Difference between revisions of "FPGA"
From Steak Wiki
Jump to navigationJump to search| Line 3: | Line 3: | ||
==Routines== | ==Routines== | ||
* https://www.eevblog.com/forum/microcontrollers/divide-clock-by-3-on-a-atf16v8b/ Divide by 3 hack | * https://www.eevblog.com/forum/microcontrollers/divide-clock-by-3-on-a-atf16v8b/ Divide by 3 hack | ||
| − | * All of hamster wiki (on archive). | + | * All of hamster wiki (on archive). Better save it though in case the archive goes down. |
| − | |||
| − | |||
| + | ===Low LUT=== | ||
| + | https://www.eevblog.com/forum/fpga/new-ti-tiny-plds-(tpld)/msg5688577/?topicseen#msg5688577 | ||
| + | trying to fill the gap between simple logic ICs and too expensive, too large FPGA/CPLD. rip xc xilinx. | ||
[[Category:online notes]] | [[Category:online notes]] | ||
Revision as of 23:00, 24 October 2024
Using FPGAs is a lot of fun. Layout and assembly not so much.
Routines
- https://www.eevblog.com/forum/microcontrollers/divide-clock-by-3-on-a-atf16v8b/ Divide by 3 hack
- All of hamster wiki (on archive). Better save it though in case the archive goes down.
Low LUT
https://www.eevblog.com/forum/fpga/new-ti-tiny-plds-(tpld)/msg5688577/?topicseen#msg5688577 trying to fill the gap between simple logic ICs and too expensive, too large FPGA/CPLD. rip xc xilinx.
